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?1 CXA2094Q 48 pin qfp (plastic) e97725a86 us audio multiplexing decoder description the CXA2094Q is an ic designed as a decoder for the zenith tv multi-channel system and also corresponds with i 2 c bus. functions include stereo demodulation, sap (separate audio program) demodulation, dbx noise reduction. various kinds of filters are built in while adjustment and mode control are all executed through i 2 c bus. features adjustment free of vco and filter. audio multiplexing decoder and dbx noise reduction decoder are all included in a single chip. almost any sort of signal processing is possible through this ic. all adjustments are possible through i 2 c bus to allow for automatic adjustment. various built-in filter circuits greatly reduce external parts. there are two systems for external inputs. there is an additional sap output. absolute maximum ratings (ta = 25?) supply voltage v cc 11 v operating temperature topr ?0 to +75 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d 0.6 w range of operating supply voltage 9 0.5 v applications tv, vcr and other decoding systems for us audio multiplexing tv broadcasting structure bipolar silicon monolithic ic * a license of the dbx-tv noise reduction system is required for the use of this device. sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 40 39 38 37 36 35 34 31 32 33 41 42 43 44 45 46 47 48 1 sda scl dgnd manin nc nc nc compin nc pcint2 pcint1 vcatc vcain veout vetc vewgt nc nc nc ve sapin nc sapout tvout-l tvout-r aux2-l tvout-s aux2-r aux1-l aux1-r esapin sout vcawgt nc vgr nc gnd saptc v cc subout stin mainout plint iref nc noisetc nc nc standard i/o level input level compin (pin 12) 100mvrms 245mvrms (selected by insw) aux1-l/r (pins 42 and 41) 490mvrms aux2-l/r (pins 45 and 44) 490mvrms output level tvout-l/r (pins 47 and 46) 490mvrms pin configuration (top view)
? 2 CXA2094Q block diagram v g r i r e f d g n d s c l s d a s a p o u t s a p i n s t i n v e v e w g t v e t c v e o u t v c a i n v c a w g t v c a t c m a i n i n m a i n o u t s u b o u t p l i n t p c i n t 1 c o m p i n v c c g n d n o i s e t c s a p t c a u x 2 - l i r e f s w l p f l p f h p f r m s d e t r m s d e t v c a v e d e e m l o g i c v c a l p f l p f 1 / 2 1 / 4 v c o l f l t s t l p f v c a l p f b p f s a p v c o l p f n o i s e d e t s a p i n d " p o n r e s " s t i n d " s a p " " n o i s e " n r s w / f o m o / s a p c w i d e b a n d s p e c t r a l " s t e r e o " d e e m f l t a m p ( + 4 d b ) i 2 c b u s i / f ( + 6 d b ) a u x 1 - r a u x 1 - l a u x 2 - r p c i n t 2 t v s w t v o u t - l t v o u t - r f e x t 2 f e x t 1 t v s w / e x t / m 1 3 3 3 2 2 8 2 4 a t t / i n s w 8 9 1 1 1 2 2 3 1 8 1 7 1 4 2 5 1 5 2 0 2 1 4 8 2 7 3 4 3 6 3 5 3 7 4 6 4 7 4 4 4 5 4 1 4 2 3 4 2 2 4 0 m a t r i x 3 9 l p f 3 8 t v o u t - s e s a p i n s o u t
? 3 CXA2094Q pin description (ta = 25 c, v cc = 9v) 7 . 5 k 3 5 2 . 1 v 1 0 . 5 k 4 4 k 3 k v c c 1 2 v c c 1 4 7 1 0 k 5 3 k 4 v v c c 3 pin no. symbol pin voltage equivalent circuit description scl dgnd mainin 4.0v serial clock input pin. v ih > 3.0v v il < 1.5v digital block gnd. input the (l + r) signal from mainout (pin 4). 1 2 3 mainout nc 4.0v (l + r) signal output pin. v c c 1 4 7 1 k 1 5 k 2 0 0 v c c 4 4 4 5 5 nc 6 6 nc 7 7
? 4 CXA2094Q pin no. symbol pin voltage equivalent circuit description pcint1 pcint2 plint 4.0v 4.0v 5.1v stereo block pll loop filter integrating pin. pilot cancel circuit loop filter integrating pin. (connect a 1 f capacitor between this pin and gnd.) v c c 1 4 7 2 0 k 2 6 2 0 k 1 0 k 2 0 k 5 0 2 0 k 2 0 k 1 1 2 2 k v c c 3 0 k 1 4 7 8 4 k v c c 2 1 0 k 1 0 k 2 k 1 4 7 9 8 9 11 compin 4.0v audio multiplexing signal input pin. 12 v c c 1 2 2 4 k 4 v 3 4 k 1 4 k 1 4 7 2 4 k 2 4 k nc 10 1 0 nc 13 1 3
? 5 CXA2094Q pin no. symbol pin voltage equivalent circuit description vgr iref gnd 1.3v 1.3v band gap reference output pin. (connect a 10 f capacitor between this pin and gnd.) set the filter and vco reference current. the reference current is adjusted with the bus data based on the current which flows to this pin. (connect a 62k ( 1%) resistor between this pin and gnd.) analog block gnd. set the time constant for the sap carrier detection circuit. (connect a 4.7 f capacitor between this pin and gnd.) 14 15 17 saptc 4.5v 18 8 k 4 k 3 k 1 0 k v c c 5 0 1 k v c c 1 8 1 7 4 0 k 4 0 k 3 0 k 3 0 p 1 . 8 k 1 6 k 6 . 3 k 1 4 7 3 0 k 1 5 k 3 0 k v c c 2 v c c 1 5 4 1 1 k 9 . 7 k 1 9 . 4 k 2 . 0 6 k 3 k 1 4 7 v c c 1 1 k 1 1 k 1 4 nc 16 1 6 nc 19 1 9 v cc supply voltage pin. 20 2 0 nc 21 2 1
? 6 CXA2094Q pin no. symbol pin voltage equivalent circuit description subout stin noisetc 4.0v 4.0v 3.0v (l-r) signal output pin. input the (l-r) signal from subout (pin 22). set the time constant for the noise detection circuit. (connect a 4.7 f capacitor between this pin and gnd.) 22 23 sapin 4.0v input the (sap) signal from sapout (pin 25). 27 24 2 k 2 k 2 k 4 k 1 k 1 4 7 5 8 0 1 4 . 4 k 5 8 0 4 k 1 0 p 2 k 2 k v c c 2 2 2 3 k 1 4 7 1 8 k 2 0 k 1 1 . 7 k 2 3 k 4 v 1 4 7 1 8 k 4 v v c c 2 3 2 7 3 k 3 k 3 . 3 k 4 k 4 v v c c 8 k 2 1 0 k 1 k 2 k v c c 2 0 0 k 2 4 sapout 4.0v sap fm detector output pin. 25 2 4 k 1 0 5 8 0 v c c 5 p 5 8 0 4 k 5 0 1 0 k 1 4 7 2 5
? 7 CXA2094Q pin no. symbol pin voltage equivalent circuit description ve vetc 4.0v 1.7v variable de-emphasis integrating pin. (connect a 2700pf capacitor and a 3.3k resistor in series between this pin and gnd.) determine the restoration time constant of the variable de-emphasis control effective value detection circuit. (the specified restoration time constant can be obtained by connecting a 3.3 f capacitor between this pin and gnd.) 28 vewgt 4.0v weight the variable de-emphasis control effective value detection circuit. (connect a 0.047 f capacitor and a 3k resistor in series between this pin and gnd.) 32 33 v c c 4 v 3 6 k 2 . 9 v 5 8 0 1 4 7 5 8 0 8 k 3 0 k 8 4 k 5 0 3 2 2 0 k 7 . 5 4 k 5 0 v c c 4 4 3 3 7 . 5 k 1 4 7 v c c 2 8 nc 26 2 6 nc 29 2 9 nc 30 3 0 nc 31 3 1
? 8 CXA2094Q pin no. symbol pin voltage equivalent circuit description veout vcain vcawgt 4.0v 4.0v 4.0v variable de-emphasis output pin. (connect a 4.7 f non-polar capacitor between pins 34 and 35.) vca input pin. input the variable de-emphasis output signal from pin 34 via a coupling capacitor. weight the vca control effective value detection circuit. (connect a 1 f capacitor and a 3.9k resistor in series between this pin and gnd.) 34 35 vcatc 1.7v determine the restoration time constant of the vca control effective value detection circuit. (the specified restoration time constant can be obtained by connecting a 10 f capacitor between this pin and gnd.) 36 37 v c c 1 0 k 5 8 0 5 8 0 5 p 3 4 4 k v c c 3 0 k 8 k 3 6 k 2 . 9 v 3 p 5 8 0 5 8 0 1 4 7 4 0 k 4 0 k 5 0 8 3 7 5 0 v c c 4 k 2 0 k 4 4 7 . 5 3 6 v c c 2 0 k v c c 4 7 k 4 7 k 3 5
? 9 CXA2094Q pin no. symbol pin voltage equivalent circuit description esapin 4.0v additional sap output pin. input the signal from sout (pin 38). sout 4.0v 38 39 v c c 1 5 k v c c 4 1 k 3 8 2 0 0 v c c 4 v 1 4 7 4 7 k 1 0 k 3 9 aux1-r 4.0v right channel external input 1 pin. 41 aux1-l 4.0v left channel external input 1 pin. 42 aux2-r 4.0v right channel external input 2 pin. 44 aux2-l 4.0v left channel external input 2 pin. 45 v c c 4 v 2 7 . 5 k 4 7 k 1 0 k 4 1 4 2 4 4 4 5 tvout-s 4.0v optional output pin. from this pin monaural or additional sap is output. 40 tvout-r 4.0v tvout right channel output pin. 46 tvout-l 4.0v tvout left channel output pin. 47 3 k 5 8 0 5 8 0 v c c 4 6 4 7 4 0 43 nc 4 3
? 10 CXA2094Q pin no. symbol pin voltage equivalent circuit description 7 . 5 k 4 . 5 k 5 4 k 3 k 7 . 5 k v c c 3 5 2 . 1 v 2 4 8 sda serial data i/o pin. v ih > 3.0v v il < 1.5v 48
? 11 CXA2094Q electrical characteristics compin input level (100% modulation level) (ta = 25 c, v cc = 9v) item current consumption main output level main de-emphasis frequency characteristic main lpf frequency characteristic main distortion main overload distortion main s/n sub output level sub lpf frequency characteristic sub distortion sub overload distortion sub s/n st ? sap crosstalk no. 1 2 3 4 5 6 7 8 9 10 11 12 13 signal icc vmain fcdeem fcmain thdm thdmmax snmain vsub fcsub thdsub thdsmax snsub ctst mode mono mono mono mono mono mono st st st st st sap input pin 12 12 12 12 12 12 12 12 12 12 12 12 min. 22 440 ?.2 ?.0 61 150 ?.0 56 60 typ. 32 490 0 ?.0 0.1 0.15 69 190 ?.5 0.1 0.2 64 70 max. 42 540 1.0 1.0 0.5 0.5 230 1.0 1.0 2.0 unit ma mvrms db db % % db mvrms db % % db db input signal no signal mono 1khz 100% mod. pre-em. on mono 5khz 30% mod. pre-em. on mono 12khz 30% mod. pre-em. on mono 1khz 100% mod. pre-em. on mono 1khz 200% mod. pre-em. off mono 1khz, pre-em. on sub (l-r) 1khz, 100% mod., nr off sub (l-r) 12khz, 30% mod., nr off sub (l-r) 1khz, 100% mod., nr off sub (l-r) 1khz, 200% mod., nr off sub (l-r) 1khz, nr off sub (l-r) 1khz, 100% mod., nr on, sap carrier (5f h ) measurement conditions 20 log ('5k'/ '1k') 20 log ('12k'/ '1k') 20 log ('100%'/ '0%') 20 log ('12k'/ '1k') 20 log ('100%'/ '0%') 20 log ('nrsw = 0'/ 'nrsw = 1') filter 15klpf 15klpf 15klpf 15klpf 15klpf 15klpf 1kbpf output pin 46/47 46/47 46/47 46/47 46/47 46/47 22 22 22 22 22 47 f h = 15.734khz main (l + r) (pre-emphasis : off) sub (l ?r) (dbx-tv : off) pilot sap carrier insw = 0 = 245mvrms = 490mvrms = 49mvrms = 147mvrms insw = 1 = 100mvrms = 200mvrms = 20mvrms = 60mvrms
? 12 CXA2094Q no. 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 item sub pilot leak stereo on level stereo on/off hysteresis sap output level sap lpf frequency characteristic sap distortion sap s/n sap ? st cross talk sap on level sap on/off hysteresis st separation 1 l ? r st separation 1 r ? l st separation 2 l ? r st separation 2 r ? l tvout output level tvout cross talk tvout muted amount symbol pcsub thst hyst vsap fcsap thdsap snsap ctsap thsap hysap stlsep1 strsep1 stlsep2 strsep2 vtv cttv1 cttv2 mutv1 mutv2 mode st st sap sap sap sap st sap st st st st ext int ext int ext input pin 12 12 12 12 12 12 12 12 12 12 12 12 41/42 44/45 41/42 44/45 12 12 41/42 44/45 min. ?.0 2.0 150 ?.0 46 60 ?2.0 2.0 23 23 23 23 ?.5 typ. ?2 ?.0 6.0 190 0 2.5 55 70 ?.0 4.0 35 35 35 35 0 ?5 ?0 ?5 ?0 max. ?0 ?.0 10.0 230 2.5 6.0 ?.5 6.0 0.5 ?0 ?0 ?0 ?5 unit db db db mvrms db % db db db db db db db db db db db db db input signal pilot (f h ) 0db change pilot (f h ) level sap 1khz 100% mod. nr off sap 10khz 30% mod . nr off sap 1khz 100% mod . nr off sap 1khz, nr off sap 1khz 100% mod. nr on, pilot (f h ) change sap carrier (5f h ) level st-l 300hz 30% mod . nr on st-r 300hz 30% mod . nr on st-l 3khz 30% mod . nr on st-r 3khz 30% mod . nr on sine wave 1khz, 490mvrms sine wave 1khz, 490mvrms mono 1khz 100% mod. pre-em. on mono 1khz 100% mod. pre-em. on sine wave 1khz, 490mvrms measurement conditions 0db = 49mvrms 0db = 49mvrms 20 log (?n level'/ 'off level') 20 log ('10k'/ '1k') 20 log ('100%'/ '0%') 20 log ('nrsw = 1'/ 'nrsw = 0') 0db = 147mvrms 20 log (?n level??ff level? 0db = 490mvrm s 0db = 490mvrms ext ? int 0db = 490mvrms int ? ext 20 log (m1 = "0"/m1 = "1") 20 log (m1 = "0"/m1 = "1") filter f h bpf 15klpf 15klpf 1kbpf 15klpf 15klpf 15klpf 15klpf 1kbpf 1kbpf 1kbpf output pin 22 bus return 25 25 25 25 47 bus return 46/47 46/47 46/47 46/47 46/47 46/47 46/47 46/47
? 13 CXA2094Q no. 33 34 35 36 item tvout dc offset tvout distortion tvout s/n tvout overload distortion symbol ostv thdtv sntv thdtvmax mode int ext ext ext ext input pin 41/42 44/45 41/42 44/45 41/42 44/45 min. ?5 75 typ. 0 0.01 88 0.1 max. 25 0.5 1.0 unit mv % db % input signal no signal sine wave 1khz, 490mvrms sine wave 1khz, 490mvrms sine wave 1khz, 2vrms measurement conditions mute (m1 = 0)/ dc difference when there is no signal 20 log ('490mvrms'/ 'no signal') filter 15klpf 15klpf 15klpf output pin 46/47 46/47 46/47 46/47
? 14 CXA2094Q electrical characteristics measurement circuit c 2 1 4 . 7 c 2 3 4 . 7 c 9 1 0 2 5 2 6 2 7 2 8 2 9 3 0 3 6 3 1 v c a t c v c a i n v e o u t v e t c v e w g t n c n c n c v e s a p i n n c s a p o u t 3 4 5 6 7 8 1 0 1 1 s c l d g n d m a i n i n n c n c n c c o m p i n n c p c i n t 2 p c i n t 1 m a i n o u t p l i n t 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 n c v g r n c g n d s a p t c v c c s u b o u t s t i n i r e f n c n o i s e t c n c 4 0 4 5 4 6 4 8 s d a t v o u t - l t v o u t - r a u x 2 - l t v o u t - s a u x 2 - r a u x 1 - l a u x 1 - r e s a p i n s o u t v c a w g t n c c 1 8 4 . 7 c 1 6 2 7 0 0 p r 7 3 . 3 k c 1 2 3 . 3 t a n t a l u m c 1 3 0 . 0 4 7 r 4 3 k s 1 s 2 s 3 s 4 b u f f f i l t e r s 1 5 k h z l p f f h b p f 1 k h z b p f m e a s u r e s s i g n a l g e n e r a t o r c 2 1 c 2 4 4 . 7 c 1 7 4 . 7 c 2 2 1 0 0 v c c v 6 9 v g n d g n d r 8 6 2 k m e t a l 1 % s i g n a l g e n e r a t o r c 2 0 1 0 c 1 4 5 6 0 0 p r 6 1 m e g r 5 1 0 0 k c 1 5 0 . 0 1 2 c 1 1 4 . 7 d g n d i 2 c b u s d a t a r 3 2 2 0 r 2 2 2 0 2 1 1 2 c 1 8 1 c 1 9 4 . 7 v 5 a c s 5 3 5 3 4 3 2 3 3 t a n t a l u m r 1 3 . 9 k 3 7 c 1 4 . 7 3 9 3 8 c 5 4 . 7 c 6 4 . 7 c 7 4 . 7 v 1 a c 4 3 4 7 c 8 4 . 7 v 2 a c c 3 4 . 7 v 3 a c c 4 4 . 7 v 4 a c 4 1 4 2 4 4 s i g n a l g e n e r a t o r s i g n a l g e n e r a t o r s i g n a l g e n e r a t o r g n d 9
? 15 CXA2094Q adjustment method (input signal level is the case when standard input signal is 245mvrms) 1. att adjustment 1) test bit is set to ?est1 = 0?and ?est-da = 0? 2) input a 100hz, 245mvrms sine wave signal to compin and monitor the tvout-l output level. then, adjust the ?tt?data for att adjustment so that the tvout-l output goes to the standard value (490mvrms). 3) adjustment range: 30% adjustment bits: 4 bits 2. separation adjustment 1) test bit is set to ?est1 = 0?and ?est-da = 0? 2) set the unit to stereo mode and input the left channel only signal (modulation factor 30%, frequency 300hz nr-on) to compin. at this time, adjust the ?ideband?adjustment data to reduce tvout-r output to the minimum. 3) next, set the frequency only of the input signal to 3khz and adjust the ?pectral?adjustment data to reduce tvout-r output to the minimum. 4) the adjustments in 2 and 3 above are performed to optimize the separation. 5) ?ideband ?pectral adjustment range: 30% adjustment range: 15% adjustment bits: 6 bits adjustment bits: 6 bits * adjust this through tuner and if when this ic is mounted on the set.
? 16 CXA2094Q description of operation the us audio multiplexing system possesses the base band spectrum shown in fig. 1. fig. 1. base band spectrum fig. 2. overall block diagram (see fig. 3 for the dbx-tv block) fig 3. dbx-tv block p e a k d e v k h z 5 0 2 5 2 5 l + r 5 0 1 5 k h z l - r d b x - t v n r 5 0 a m - d s b - s c s a p d b x - t v n r f m 1 0 k h z 5 0 1 0 k h z t e l e m e t r y f m 3 k h z 1 5 f h = 1 5 . 7 3 4 k h z f h 2 f h 3 f h 4 f h 5 f h 6 f h 6 . 5 f h f 5 p i l o t 3 ( c o m p i n ) s t e r e o l p f p l l ( v c o 8 f h ) 2 f h l 0 f h l 9 0 f h l 0 m o d e c o n t r o l p i l o t d e t m v c a p i l o t c a n c e l m a i n l p f d e . e m ( m a i n o u t ) l + r 4 . 7 ( m a i n i n ) l - r ( d s b ) d e t i n j . l o c k s u b v c a s u b l p f w i d e b a n d ( s u b o u t ) ( s t i n ) 4 . 7 n r s w d b x - t v b l o c k m a t r i x ( l c h ) ( r c h ) m o d e c o n t r o l ( s a p i n ) 4 . 7 s a p ( f m ) d e t s a p l p f i c b u s d e c o d e r m o d e c o n t r o l s a p b p f ( s a p o u t ) l r t o t v s w 2 n o i s e d e t i c b u s d e c o d e r 2 s a p d e t i 2 c b u s d e c o d e r a b 2 5 2 2 1 2 4 3 2 3 2 7 4 0 ( t v o u t - s ) l p f 3 8 3 9 4 . 7 ( s o u t ) ( e s a p i n ) n r s w f i x e d d e e m p h a s i s v a r i a b l e d e e m p h a s i s ( v e o u t ) ( v c a i n ) t o m a t r i x 4 . 7 h p f l p f l p f r m s d e t r m s d e t v c a a b ( s t i n ) ( s a p i n ) 3 5 3 4 2 3 2 7
? 17 CXA2094Q fig. 4. switch block (1) l + r (main) after the audio multiplexing signal input from compin (pin 12) passes through mvca, the sap signal and telemetry signal are suppressed by stereo lpf. next, the pilot signals are canceled. finally, the l ?r signal and sap signal are removed by main lpf, and frequency characteristics are flattened (de-emphasized) and input to the matrix. (2) l ?r (sub) the l ?r signal follows the same course as l + r before the pilot signal is canceled. l ?r has no carrier signal, as it is a suppressed-carrier double-sideband amplitude modulated signal (dsb-am modulated). for this reason, the pilot signal is used to regenerate the carrier signal (quasi-sine wave) to be used for the demodulation of the l ?r signal. in the last stage, the residual high frequency components are removed by sub lpf and the l ?r signal is input to the dbx-tv block via the nrsw circuit after passing through subvca. (3) sap sap is an fm signal using 5f h as a carrier as shown in the fig. 1. first, the sap signal only is extracted using sap bpf. then, this is subjected to fm detection. finally, residual high frequency components are removed and frequency characteristics flattened using sap lpf, and the sap signal is input to the dbx-tv block via the nrsw circuit. when there is no sap signal, the pin 25 output is soft muted. (4) mode discrimination stereo discrimination is performed by detecting the pilot signal amplitude. sap discrimination is performed by detecting the 5f h carrier amplitude. noise discrimination is performed by detecting the noise near 25khz after fm detection of sap signal. (5) dbx-tv block either the l ?r signal or sap signal input respectively from st in (pin 23) or sap in (pin 27) is selected by the mode control and input to the dbx-tv block. the input signal then passes through the fixed de-emphasis circuit and is applied to the variable de- emphasis circuit. the signal output from the variable de-emphasis circuit passes through an external capacitor and is applied to vca (voltage control amplifier). finally, the vca output is converted from a current to a voltage using an operational amplifier and then input to the matrix. ( l c h ) ( r c h ) ( a u x 1 - l ) ( a u x 1 - r ) f r o m m a t r i x ( t v o u t - l ) ( t v o u t - r ) t v s w ( a u x 2 - l ) ( a u x 2 - r ) 4 1 4 2 4 5 4 4 4 6 4 7
? 18 CXA2094Q the variable de-emphasis circuit transmittance and vca gain are respectively controlled by each of effective value detection circuits. each of the effective value detection circuits passes the input signal through a predetermined filter for weighting before the effective value of the weighted signal is detected to provide the control signal. (6) matrix, tvsw the signals (l + r, l ?r, sap) input to ?atrix?become the outputs for the st-l, st-r, mono and sap signals according to the mode control and whether there is st / sap discrimination. ?vsw?switches the ?atrix?output signal, external input signal (input to aux1-l, r (pins 42 and 41)), external input signal (input to aux2-l, r (pins 45 and 44)) and external forced mono. (7) others ?vca?is a vca which adjusts the input signal level to the standard level of this ic. ?ias?supplies the reference voltage and reference current to the other blocks. the current flowing to the resistor connecting iref (pin 15) with gnd become the reference current.
? 19 CXA2094Q spectral (6) wideband (6) **** 0000 **** 0001 **** 0010 **** 0011 **** 0100 * * * * * slave receiver 84h (1000 0100) slave transmitter 85h (1000 0101) register specifications slave address register table status registers data sub address msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 test-da tvsw insw test1 ext smd nrsw attsw fomo fst sapc fext1 m1 fext2 sta1 bit7 power on reset sta2 bit6 stereo sta3 bit5 sap sta4 bit4 noise sta5 bit3 sta6 bit2 sta7 bit1 sta8 bit0 att (4) * : don't care
? 20 CXA2094Q description of registers control registers att spectral wideband test-da test1 fst nrsw fomo tvsw fext1 fext2 ext m1 smd attsw insw sapc input level adjustment adjustment of stereo separation (3khz) adjustment of stereo separation (300hz) turn to dac test mode and vco adjustment mode by means of test-da = 1. turn to test mode by means of test = 1. (adjustment of filter) turn to forced stereo by means of fst = 1. selection of the output signal (stereo mode, sap mode) turn to forced mono by means of fomo = 1. (left channel only is mono during sap output.) selection of tv mode or external input mode for tvout output external input 1 forced mono (1: forced mono on) external input 2 forced mono (1: forced mono on) selection of external input 1 mode or external input 2 mode for tvout output. (tvsw = 1) selection of tvout mute on/off (0: mute on, 1: mute off) selection of l + r or additional sap turn the input stage mvca off when attsw = 1. selection of standard input level selection of sap mode or l + r mode according to the presence of sap broadcasting register contents 4 6 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 a a a t t t u u u u u u u u s s s 9 1f 1f 0 0 0 0 0 0 0 1 0 number of bits classifi- cation * 1 standard setting * 1 classification u: user control a: adjustment s: proper to set t: test status registers ponres stereo sap noise 1 1 1 1 power on reset detection; 1: reset stereo discrimination of the compin input signal; 1: stereo sap discrimination of the compin input signal; 1: sap noise level discrimination of the sap signal; 1: noise register number of bits contents
? 21 CXA2094Q description of control registers att (4): adjust the signal level input to compin (pin 12) to the standard input level. variable range of the input signal: standard input level ?.0db to +3.0db 0 = level min. f = level max. spectral (6): perform high frequency (fs = 3khz) separation adjustment. 0 = level max. 3f = level min. wideband (6): perform low frequency (fs = 300hz) separation adjustment. 0 = level min. 3f = level max. test-da (1): set dac output test mode. 0 = normal mode 1 = dac output test mode in addition, the following output are present at pin 47. tvout-l (pin 47): da control dc level test1 (1): monitor sap bpf and nr bpf output. 0 = normal mode 1 = sap bpf and nr bpf output in addition, the following outputs are present at pins 47 and 46. tvout-l (pin 47): sap bpf out tvout-r (pin 46): nr bpf out fst (1): select forced stereo mode 0 = normal mode 1 = forced stereo mode nrsw (1): select stereo mode or sap mode 0 = stereo mode 1 = sap mode
? 22 CXA2094Q fomo (1): select forced mono mode 0 = normal mode 1 = forced mono mode fext1 (1): turn external input [1] to forced mono. 0 = normal mode 1 = external input [1] is forced mono. input the same signal to both aux1-l and aux1-r. fext2 (1): turn external input [2] to forced mono 0 = normal mode 1 = external input [2] is forced mono input the same signal to both aux2-l and aux2-r. tvsw (1): select tv mode or external input mode for tvout output. 0 = tv mode 1 = external input mode ext (1): select external input [1] mode or external input [2] mode for tvout output. (tvsw = 1) 0 = external input [1] mode 1 = external input [2] mode m1 (1): mute the tvout-l and tvout-r output. 0 = mute on 1 = mute off smd (1): select l + r or additional sap signal 0 = l + r output is selected 1 = additional sap output is selected attsw (1): select bypass sw of mvca 0 = normal mode 1 = mvca is passed insw (1): select standard input level of compin (pin 12) 0 = 245mvrms 1 = 100mvrms sapc (1): select the sap signal output mode when there is no sap signal, the conditions for selecting sap output are selected by sapc. 0 = l + r output is selected 1 = sap output is selected
? 23 CXA2094Q description of mode control priority ranking: m1 > tvsw/ext > (nrsw & fomo & sapc) nrsw fomo sapc m1 tvsw/ext ?elect dbx input and tv decoder output conditions: fomo = 0 nrsw = 0 (mono or st output) during st input: left channel: l, right channel: r during other input: left channel: l + r, right channel: l + r nrsw = 1 (sap output) when there is ?ap?during sap discrimination ?left channel: sap, right channel: sap when there is ?o sap? output is the same as when nrsw = 0. ?elect dbx input and tv decoder output conditions: fomo = 0 nrsw = 0 (mono or st output) as on the left nrsw = 1 (sap output) regardless of the presence of sap discrimination, dbx input: ?ap left channel: sap, right channel: sap however, when there is no sap, sapout output is soft muted (?db) mode control sapc = 0 sapc = 1 ?orced mono fomo = 1 during sap output: left channel: l + r, right channel: sap during st or mono output: left channel: l + r, right channel: l + r change the selection conditions for ?ono or st output?and ?ap output? sapc = 0: switch to sap output when there is sap discrimination. do not switch to sap output when there is no sap discrimination. sapc = 1: switch to sap output regardless of whether there is sap discrimination. ?ute m1 = 0: tvout-l, r, s output is muted. ?v mode/external input mode selection tvsw = 0: set tvout-l, r output to tv mode. tvsw = 1: set tvout-l, r output to external input mode. ext = 0: set tvout-l, r output to external input [1] mode. (tvsw = 1) ext = 1: set tvout-l, r output to external input [2] mode. (tvsw = 1)
? 24 CXA2094Q decoder output and mode control table 1 (sapc = 1) note (sap) : the sapout output signal is soft muted (approximately ?db). the signal is soft muted when noise = 1. * : don? care. * 1 sap or noise discrimination may be made during mono or stereo input when the noise is inputted in the weak electric field. then microcomputer reads "noise" status from ic and decides whether sap is outputted. "noise" status rises earlier than "sap" status when the amount of noise is increased to compin. 0 0 0 0 * 1 mute l + r l + r 0 0 0 1 0 1 sap sap sap mono 0 0 0 1 1 1 sap l + r sap 0 * 1 0 * 1 mute l + r l + r 0 * 1 1 0 1 (sap) (sap) (sap) 0 * 1 1 1 1 (sap) l + r (sap) 1 0 * 0 0 1 l ?r l r 1 0 * 0 1 1 mute l + r l + r 1 1 1 0 0 1 l ?r l r stereo 1 1 1 0 1 1 mute l + r l + r 1 0 0 1 0 1 sap sap sap 1 0 0 1 1 1 sap l + r sap 1 * 1 1 0 1 (sap) (sap) (sap) 1 * 1 1 1 1 (sap) l + r (sap) 0 1 * 0 0 1 mute l + r l + r 0 1 * 0 1 1 mute l + r l + r mono & sap 0 1 0 1 0 1 sap sap sap 0 1 0 1 1 1 sap l + r sap 0 1 1 1 0 1 (sap) (sap) (sap) 0 1 1 1 1 1 (sap) l + r (sap) 1 1 * 0 0 1 l ?r l r 1 1 * 0 1 1 mute l + r l + r stereo & sap 1 1 0 1 0 1 sap sap sap 1 1 0 1 1 1 sap l + r sap 1 1 1 1 0 1 (sap) (sap) (sap) 1 1 1 1 1 1 (sap) l + r (sap) input signal mode mode detection mode control dbx input output st sap noise nrsw fomo sapc lch rch * 1 * 1
? 25 CXA2094Q decoder output and mode control table 2 (sapc = 0) 0 0 * * * 0 mute l + r l + r 0 1 1 0 0 0 mute l + r l + r mono 0 1 1 0 1 0 mute l + r l + r 0 1 1 1 0 0 (sap) (sap) (sap) 0 1 1 1 1 0 (sap) l + r (sap) 1 0 * 0 0 0 l ?r l r 1 0 * 0 1 0 mute l + r l + r 1 0 * 1 0 0 l ?r l r stereo 1 0 * 1 1 0 mute l + r l + r 1 1 1 0 0 0 l ?r l r 1 1 1 0 1 0 mute l + r l + r 1 1 1 1 0 0 (sap) (sap) (sap) 1 1 1 1 1 0 (sap) l + r (sap) 0 1 0 0 0 0 mute l + r l + r 0 1 0 0 1 0 mute l + r l + r 0 1 0 1 0 0 sap sap sap mono & sap 0 1 0 1 1 0 sap l + r sap 0 1 1 0 0 0 mute l + r l + r 0 1 1 0 1 0 mute l + r l + r 0 1 1 1 0 0 (sap) (sap) (sap) 0 1 1 1 1 0 (sap) l + r (sap) 1 1 0 0 0 0 l ?r l r 1 1 0 0 1 0 mute l + r l + r 1 1 0 1 0 0 sap sap sap stereo & sap 1 1 0 1 1 0 sap l + r sap 1 1 1 0 0 0 l ?r l r 1 1 1 0 1 0 mute l + r l + r 1 1 1 1 0 0 (sap) (sap) (sap) 1 1 1 1 1 0 (sap) l + r (sap) input signal mode mode detection mode control dbx input output st sap noise nrsw fomo sapc lch rch * 1 * 1 note (sap) : the sapout output signal is soft muted (approximately ?db). the signal is soft muted when noise = 1. * : don? care. * 1 sap or noise discrimination may be made during mono or stereo input when the noise is inputted in the weak electric field. then microcomputer reads "noise" status from ic and decides whether sap is outputted. "noise" status rises earlier than "sap" status when the amount of noise is increased to compin.
? 26 CXA2094Q mode control table 3 tv (l) / tv (r) are selected in matrix tv (l): mono, st-l, sap, (sapbpfout, d/aout) tv (r): mono, st-r, sap, (nrbpfout, stvco freerun (4f h )) tvsw 0 1 1 1 1 fext2 0 1 fext1 0 1 ext 0 0 1 1 m1 0 1 1 1 1 1 1 2 3 4 5 6 tvout-l mute tv (l) aux1-l aux1-l aux2-l aux2-l tvout-r mute tv (r) aux1-r aux1-l aux2-r aux2-l i 2 c bus block items (sda, scl) i 2 c bus load conditions: pull-up resistor 4k (connect to +5v) load capacity 200pf (connect to gnd) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 high level input voltage low level input voltage high level input current low level input current low level output voltage sda (pin 48) during 3ma inflow maximum inflow current input capacitance maximum clock frequency minimum waiting time for data change minimum waiting time for start of data transfer low level clock pulse width high level clock pulse width minimum waiting time for start preparation minimum data hold time minimum data preparation time rise time fall time minimum waiting time for stop preparation v ih v il i ih i il v ol i ol c i f scl t buf t hd : sta t low t high t su : sta t hd : dat t su : dat t r t f t su : sto 3.0 0 0 3 0 4.7 4.0 4.7 4.0 4.7 0 250 4.7 5.0 1.5 10 10 0.4 10 100 1 300 v a v ma pf khz s ns s ns s no. item symbol min. typ. max. unit
? 27 CXA2094Q s d a s c l s t a r t c o n d i t i o n s s t o p c o n d i t i o n p h l h i z l i 2 c bus signal there are two i 2 c signals, sda (serial data) and scl (serial clock) signals. sda is a bidirectional signal. accordingly there are 3 values outputs, h, l and hiz. i 2 c transfer begins with start condition and ends with stop condition. s d a s c l t b u f p s t h d : s t a t l o w t h d : d a t t h i g h t r t f t h d : s t a t s u : s t a s r t s u : s t o p t s u : d a t i 2 c bus control signal
? 28 CXA2094Q i 2 c data write (write from i 2 c controller to the ic) * data can be transferred in 8-bit units to be set as required. sub address is incremented automatically. i 2 c data read (read from the ic to i 2 c controller) read timing * data read is performed during scl rise. s a d d r e s s 1 6 7 8 9 1 8 9 s c l a c k d a t a a c k s d a h d u r i n g r e a d h i z 7 p d a t a 1 2 3 4 5 6 7 8 9 9 i c o u t p u t s d a s c l m s b l s b a c k a c k r e a d t i m i n g a c k a c k d a t a d a t a p 8 9 1 8 9 h i z h i z d a t a ( n ) d a t a ( n + 1 ) a c k 1 8 9 1 8 9 a c k d a t a ( n + 2 ) h i z h i z l s b m s b s a d d r e s s 1 2 3 4 5 6 7 8 9 1 8 9 s d a s c l m s b l d u r i n g w r i t e m s b l s b h i z h i z a c k s u b a d d r e s s a c k
? 29 CXA2094Q i n p u t l e v e l v s . d i s t o r t i o n c h a r a c t e r i s t i c s 1 ( m o n o ) d i s t o r t i o n [ % ] 1 . 0 0 . 1 1 0 0 1 0 i n p u t l e v e l v s . d i s t o r t i o n c h a r a c t e r i s t i c s 2 ( s t e r e o ) d i s t o r t i o n [ % ] 1 0 1 . 0 1 0 0 1 0 i n p u t l e v e l [ d b ] i n p u t s i g n a l : s t e r e o l = r ( d b x - t v n r o n ) , 1 k h z 0 d b = 1 0 0 % m o d u l a t i o n l e v e l v c c = 9 v , 3 0 k h z u s i n g l p f , s t m o d e m e a s u r e m e n t p o i n t : t v o u t - l / r i n p u t l e v e l v s . d i s t o r t i o n c h a r a c t e r i s t i c s 3 ( s a p ) d i s t o r t i o n [ % ] 1 0 1 . 0 1 0 0 1 0 i n p u t l e v e l [ d b ] i n p u t l e v e l [ d b ] s t a n d a r d l e v e l ( 1 0 0 % ) s t a n d a r d l e v e l ( 1 0 0 % ) i n p u t s i g n a l : s a p ( d b x - t v n r o n ) 1 k h z , 0 d b = 1 0 0 % m o d u l a t i o n l e v e l v c c = 9 v , 3 0 k h z u s i n g l p f , s a p m o d e m e a s u r e m e n t p o i n t : t v o u t - l / r s t a n d a r d l e v e l ( 1 0 0 % ) i n p u t s i g n a l : m o n o ( p r e - e m p h a s i s o n ) , 1 k h z 0 d b = 1 0 0 % m o d u l a t i o n l e v e l v c c = 9 v , 3 0 k h z u s i n g l p f m e a s u r e m e n t p o i n t : t v o u t - l / r
? 30 CXA2094Q f r e q u e n c y [ k h z ] g a i n [ d b ] s t e r e o l p f f r e q u e n c y c h a r a c t e r i s t i c s 1 0 5 0 5 1 0 0 2 0 4 0 6 0 8 0 1 0 0 3 0 1 0 0 2 0 5 0 1 2 5 1 0 2 0 5 0 7 7 0 1 0 0 4 0 3 0 1 0 2 0 g a i n ( f c m a i n a n d f c s u b ) [ d b ] f r e q u e n c y [ k h z ] m a i n l p f a n d s u b l p f f r e q u e n c y c h a r a c t e r i s t i c s 1 0 0 2 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 0 2 0 s a p f r e q u e n c y c h a r a c t e r i s t i c s a n d g r o u p d e l a y g r o u p d e l a y [ s ] 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 1 0 2 0 0 3 0 5 f h g a i n g r o u p d e l a y 3 . 8 f h 6 . 2 f h f r e q u e n c y [ k h z ] g a i n [ d b ] f r e q u e n c y [ k h z ] a d d i t i o n a l s a p f r e q u e n c y c h a r a c t e r i s t i c s o u t p u t l e v e l [ m v r m s ] 5 0 0 1 0 0 1 0 1 . 0 1 0 1 0 0 % m o d u l a t i o n 3 0 % m o d u l a t i o n 1 0 % m o d u l a t i o n 1 % m o d u l a t i o n 0 . 1
? 31 CXA2094Q package outline unit: mm s o n y c o d e e i a j c o d e j e d e c c o d e m p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t e p o x y r e s i n s o l d e r / p a l l a d i u m p l a t i n g c o p p e r / 4 2 a l l o y 4 8 p i n q f p ( p l a s t i c ) 1 5 . 3 0 . 4 1 2 . 0 0 . 1 + 0 . 4 0 . 8 0 . 3 0 . 1 + 0 . 1 5 0 . 1 2 1 3 2 4 2 5 3 6 3 7 4 8 1 1 2 2 . 2 0 . 1 5 + 0 . 3 5 0 . 9 0 . 2 0 . 1 0 . 1 + 0 . 2 1 3 . 5 0 . 1 5 0 . 1 5 0 . 0 5 + 0 . 1 q f p - 4 8 p - l 0 4 * q f p 0 4 8 - p - 1 2 1 2 - b 0 . 7 g n o t e : p a l l a d i u m p l a t i n g t h i s p r o d u c t u s e s s - p d p p f ( s o n y s p e c . - p a l l a d i u m p r e - p l a t e d l e a d f r a m e ) .

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